Wei Cheng, Yibo Fan, YanHeng Lu, Yize Jin, Xiaoyang Zeng. A high-throughput HEVC deblocking filter VLSI architecture for 8k×4k application. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015. pages 605-608, IEEE, 2015. [doi]
Abstract is missing.