Ching-Hwa Cheng, Jiun-In Guo. A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism. In Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, VLSI-DAT 2012, Hsinchu, Taiwan, April 23-25, 2012. pages 1-4, IEEE, 2012. [doi]
Abstract is missing.