Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience)

Eric Cheng, Shahrzad Mirkhani, Lukasz G. Szafaryn, Chen-Yong Cher, Hyungmin Cho, Kevin Skadron, Mircea R. Stan, Klas Lilja, Jacob A. Abraham, Pradip Bose, Subhasish Mitra. Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). IEEE Trans. on CAD of Integrated Circuits and Systems, 37(9):1839-1852, 2018. [doi]

Authors

Eric Cheng

This author has not been identified. Look up 'Eric Cheng' in Google

Shahrzad Mirkhani

This author has not been identified. Look up 'Shahrzad Mirkhani' in Google

Lukasz G. Szafaryn

This author has not been identified. Look up 'Lukasz G. Szafaryn' in Google

Chen-Yong Cher

This author has not been identified. Look up 'Chen-Yong Cher' in Google

Hyungmin Cho

This author has not been identified. Look up 'Hyungmin Cho' in Google

Kevin Skadron

This author has not been identified. Look up 'Kevin Skadron' in Google

Mircea R. Stan

This author has not been identified. Look up 'Mircea R. Stan' in Google

Klas Lilja

This author has not been identified. Look up 'Klas Lilja' in Google

Jacob A. Abraham

This author has not been identified. Look up 'Jacob A. Abraham' in Google

Pradip Bose

This author has not been identified. Look up 'Pradip Bose' in Google

Subhasish Mitra

This author has not been identified. Look up 'Subhasish Mitra' in Google