Statistical Timing and Power Optimization of Architecture and Device for FPGAs

Lerong Cheng, Wenyao Xu, Fang Gong, Yan Lin, Ho-Yan Wong, Lei He. Statistical Timing and Power Optimization of Architecture and Device for FPGAs. TRETS, 5(2):9, 2012. [doi]

@article{ChengXGLWH12,
  title = {Statistical Timing and Power Optimization of Architecture and Device for FPGAs},
  author = {Lerong Cheng and Wenyao Xu and Fang Gong and Yan Lin and Ho-Yan Wong and Lei He},
  year = {2012},
  doi = {10.1145/2209285.2209288},
  url = {http://doi.acm.org/10.1145/2209285.2209288},
  researchr = {https://researchr.org/publication/ChengXGLWH12},
  cites = {0},
  citedby = {0},
  journal = {TRETS},
  volume = {5},
  number = {2},
  pages = {9},
}