Wrapper Chain Design for Testing TSVs Minimization in Circuit-Partitioned 3D SoC - researchr publication authors

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Yuanqing Cheng, Lei Zhang 0008, Yinhe Han, Jun Liu, Xiaowei Li 0001. Wrapper Chain Design for Testing TSVs Minimization in Circuit-Partitioned 3D SoC. In Proceedings of the 20th IEEE Asian Test Symposium, ATS 2011, New Delhi, India, November 20-23, 2011. pages 181-186, IEEE Computer Society, 2011. [doi]

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