An Efficient Multi-Level Partitioning Algorithm for VLSI Circuits

Jong-Sheng Cherng, Sao-Jie Chen. An Efficient Multi-Level Partitioning Algorithm for VLSI Circuits. In 16th International Conference on VLSI Design (VLSI Design 2003), 4-8 January 2003, New Delhi, India. pages 70, IEEE Computer Society, 2003. [doi]

Abstract

Abstract is missing.