An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle

Shu-Yuan Chin, Chung-Yu Wu. An Alorithmic Analog-to-Digital Converter with low Ratio-and Gain-Sensitivities and 4N-Clock Conversion Cycle. In ISCAS. pages 325-328, 1994.

Abstract

Abstract is missing.