Characterization of logic circuit techniques for high leakage CMOS technologies

Phillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky. Characterization of logic circuit techniques for high leakage CMOS technologies. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 230-235, ACM, 2004. [doi]

@inproceedings{ChinZGK04,
  title = {Characterization of logic circuit techniques for high leakage CMOS technologies},
  author = {Phillip Chin and Charles A. Zukowski and George Gristede and Stephen V. Kosonocky},
  year = {2004},
  doi = {10.1145/988952.989008},
  url = {http://doi.acm.org/10.1145/988952.989008},
  tags = {logic},
  researchr = {https://researchr.org/publication/ChinZGK04},
  cites = {0},
  citedby = {0},
  pages = {230-235},
  booktitle = {Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004},
  editor = {David Garrett and John Lach and Charles A. Zukowski},
  publisher = {ACM},
  isbn = {1-58113-853-9},
}