Lan-chou Cho, Chihun Lee, Chao-Ching Hung, Shen-Iuan Liu. A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology. J. Solid-State Circuits, 44(3):775-783, 2009. [doi]
@article{ChoLHL09,
title = {A 33.6-to-33.8 Gb/s Burst-Mode CDR in 90 nm CMOS Technology},
author = {Lan-chou Cho and Chihun Lee and Chao-Ching Hung and Shen-Iuan Liu},
year = {2009},
doi = {10.1109/JSSC.2008.2012326},
url = {https://doi.org/10.1109/JSSC.2008.2012326},
researchr = {https://researchr.org/publication/ChoLHL09},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {44},
number = {3},
pages = {775-783},
}