A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs - researchr publication authors

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Shenghsun Cho, Mrunal Patel, Han Chen, Michael Ferdman, Peter Milder. A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs. In Jason Helge Anderson, Kia Bazargan, editors, Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2018, Monterey, CA, USA, February 25-27, 2018. pages 87-96, ACM, 2018. [doi]

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