Edward Choi, Injun Choi, Chanhee Jeon, Gichan Yun, Donghyeon Yi, Sohmyung Ha, Ik Joon Chang, Minkyu Je. A 133.6TOPS/W Compute-In-Memory SRAM Macro with Fully Parallel One-Step Multi-Bit Computation. In IEEE Custom Integrated Circuits Conference, CICC 2022, Newport Beach, CA, USA, April 24-27, 2022. pages 1-2, IEEE, 2022. [doi]
@inproceedings{ChoiCJYYHCJ22,
title = {A 133.6TOPS/W Compute-In-Memory SRAM Macro with Fully Parallel One-Step Multi-Bit Computation},
author = {Edward Choi and Injun Choi and Chanhee Jeon and Gichan Yun and Donghyeon Yi and Sohmyung Ha and Ik Joon Chang and Minkyu Je},
year = {2022},
doi = {10.1109/CICC53496.2022.9772821},
url = {https://doi.org/10.1109/CICC53496.2022.9772821},
researchr = {https://researchr.org/publication/ChoiCJYYHCJ22},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2022, Newport Beach, CA, USA, April 24-27, 2022},
publisher = {IEEE},
isbn = {978-1-6654-0756-4},
}