2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Min-Seong Choo, Han-Gon Ko, Sung-Yong Cho, KwangHo Lee, Deog Kyoon Jeong. 2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018. pages 73-76, IEEE, 2018. [doi]

This author has not been identified. Look up 'Min-Seong Choo' in GoogleThis author has not been identified. Look up 'Han-Gon Ko' in GoogleThis author has not been identified. Look up 'Sung-Yong Cho' in GoogleThis author has not been identified. Look up 'KwangHo Lee' in GoogleThis author has not been identified. Look up 'Deog Kyoon Jeong' in Google

runs on WebDSL