2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop

Min-Seong Choo, Han-Gon Ko, Sung-Yong Cho, KwangHo Lee, Deog Kyoon Jeong. 2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018. pages 73-76, IEEE, 2018. [doi]

@inproceedings{ChooKCLJ18-0,
  title = {2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop},
  author = {Min-Seong Choo and Han-Gon Ko and Sung-Yong Cho and KwangHo Lee and Deog Kyoon Jeong},
  year = {2018},
  doi = {10.1109/ASSCC.2018.8579270},
  url = {https://doi.org/10.1109/ASSCC.2018.8579270},
  researchr = {https://researchr.org/publication/ChooKCLJ18-0},
  cites = {0},
  citedby = {0},
  pages = {73-76},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2018, Tainan, Taiwan, November 5-7, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-6413-1},
}