No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips

Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang. No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. In Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009. pages 587-592, ACM, 2009. [doi]

@inproceedings{ChouCWCCWW09,
  title = {No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips},
  author = {Shu-Hsuan Chou and Chien-Chih Chen and Chi-Neng Wen and Yi-Chao Chan and Tien-Fu Chen and Chao-Ching Wang and Jinn-Shyan Wang},
  year = {2009},
  doi = {10.1145/1629911.1630062},
  url = {http://doi.acm.org/10.1145/1629911.1630062},
  tags = {caching},
  researchr = {https://researchr.org/publication/ChouCWCCWW09},
  cites = {0},
  citedby = {0},
  pages = {587-592},
  booktitle = {Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009},
  publisher = {ACM},
  isbn = {978-1-60558-497-3},
}