No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips

Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang. No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. In Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009. pages 587-592, ACM, 2009. [doi]

Abstract

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