Pooja Choudhary, Lava Bhargava, Masahiro Fujita, Virendra Singh. Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees. In Ambika Prasad Shah, Sudeb Dasgupta, Anand D. Darji, Jaynarayan T. Tudu, editors, VLSI Design and Test - 26th International Symposium, VDAT 2022, Jammu, India, July 17-19, 2022, Revised Selected Papers. Volume 1687 of Communications in Computer and Information Science, pages 435-449, Springer, 2022. [doi]
Abstract is missing.