Power Modeling of Power Gated FSM and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm

Priyanka Choudhury, Sambhu Nath Pradhan. Power Modeling of Power Gated FSM and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm. In Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay, editors, Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings. Volume 7373 of Lecture Notes in Computer Science, pages 19-29, Springer, 2012. [doi]

@inproceedings{ChoudhuryP12-0,
  title = {Power Modeling of Power Gated FSM and Its Low Power Realization by Simultaneous Partitioning and State Encoding Using Genetic Algorithm},
  author = {Priyanka Choudhury and Sambhu Nath Pradhan},
  year = {2012},
  doi = {10.1007/978-3-642-31494-0_3},
  url = {http://dx.doi.org/10.1007/978-3-642-31494-0_3},
  researchr = {https://researchr.org/publication/ChoudhuryP12-0},
  cites = {0},
  citedby = {0},
  pages = {19-29},
  booktitle = {Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings},
  editor = {Hafizur Rahaman and Sanatan Chattopadhyay and Santanu Chattopadhyay},
  volume = {7373},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-642-31493-3},
}