Avishek Choudhury, Biplab K. Sikdar. Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration. J. Electronic Testing, 36(1):59-73, 2020. [doi]
@article{ChoudhuryS20,
title = {Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration},
author = {Avishek Choudhury and Biplab K. Sikdar},
year = {2020},
doi = {10.1007/s10836-019-05852-6},
url = {https://doi.org/10.1007/s10836-019-05852-6},
researchr = {https://researchr.org/publication/ChoudhuryS20},
cites = {0},
citedby = {0},
journal = {J. Electronic Testing},
volume = {36},
number = {1},
pages = {59-73},
}