Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration

Avishek Choudhury, Biplab K. Sikdar. Modeling Remapping Based Fault Tolerance Techniques for Chip Multiprocessor Cache with Design Space Exploration. J. Electronic Testing, 36(1):59-73, 2020. [doi]

Abstract

Abstract is missing.