A Transmission Line Modelling VLSI processor designed with a novel Electronic System Level Methodology

Vassilios A. Chouliaras, James A. Flint, Yibin Li. A Transmission Line Modelling VLSI processor designed with a novel Electronic System Level Methodology. In 14th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2007, Marrakech, Morocco, December 11-14, 2007. pages 322-325, IEEE, 2007. [doi]

Authors

Vassilios A. Chouliaras

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James A. Flint

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Yibin Li

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