A Transmission Line Modelling VLSI processor designed with a novel Electronic System Level Methodology

Vassilios A. Chouliaras, James A. Flint, Yibin Li. A Transmission Line Modelling VLSI processor designed with a novel Electronic System Level Methodology. In 14th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2007, Marrakech, Morocco, December 11-14, 2007. pages 322-325, IEEE, 2007. [doi]

@inproceedings{ChouliarasFL07,
  title = {A Transmission Line Modelling VLSI processor designed with a novel Electronic System Level Methodology},
  author = {Vassilios A. Chouliaras and James A. Flint and Yibin Li},
  year = {2007},
  doi = {10.1109/ICECS.2007.4510995},
  url = {http://dx.doi.org/10.1109/ICECS.2007.4510995},
  researchr = {https://researchr.org/publication/ChouliarasFL07},
  cites = {0},
  citedby = {0},
  pages = {322-325},
  booktitle = {14th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2007, Marrakech, Morocco, December 11-14, 2007},
  publisher = {IEEE},
  isbn = {978-1-4244-1377-5},
}