An efficient linearity test for on-chip high speed ADC and DAC using loop-back

Ji Hwan (Paul) Chun, Hak-soo Yu, Jacob A. Abraham. An efficient linearity test for on-chip high speed ADC and DAC using loop-back. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 328-331, ACM, 2004. [doi]

Abstract

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