A 12-bit 160-MS/s ping-pong subranged-SAR ADC in 65nm CMOS

Yung-Hui Chung, Ya-Mien Hsu, Chia-Wei Yen, Wei-Shu Rih. A 12-bit 160-MS/s ping-pong subranged-SAR ADC in 65nm CMOS. In International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017. pages 5-6, IEEE, 2017. [doi]

@inproceedings{ChungHYR17,
  title = {A 12-bit 160-MS/s ping-pong subranged-SAR ADC in 65nm CMOS},
  author = {Yung-Hui Chung and Ya-Mien Hsu and Chia-Wei Yen and Wei-Shu Rih},
  year = {2017},
  doi = {10.1109/ISOCC.2017.8368774},
  url = {https://doi.org/10.1109/ISOCC.2017.8368774},
  researchr = {https://researchr.org/publication/ChungHYR17},
  cites = {0},
  citedby = {0},
  pages = {5-6},
  booktitle = {International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-2285-8},
}