Table of Contents

• A 14nm FinFET analog baseband SOC for multi-mode cellular applications with tri-band carrier aggregationByungki Han, Jongwoo Lee, Seunghyun Oh, Jae Kwon Kim, Eswar Mamidala, Thomas Cho. 1-2 [doi]
• A low-power and performance-efficient SAR ADC designNahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Insoo Kim, Gyung-Su Byun. 3-4 [doi]
• A 12-bit 160-MS/s ping-pong subranged-SAR ADC in 65nm CMOSYung-Hui Chung, Ya-Mien Hsu, Chia-Wei Yen, Wei-Shu Rih. 5-6 [doi]
• A low power reconfigurable SAR ADC for CMOS MEMS sensorHao-Min Lin, Kuei-Ann Wen. 7-8 [doi]
• Continuous-time delta-sigma modulator with an upfront passive-RC low-pass networkDaxiang Li, Yang Zhang, Debajit Basak, Kong-Pang Pun. 9-10 [doi]
• A new repair scheme for TSV-based 3D memory using base die repair cellsDonghyun Han, Hayoung Lee, Donghyun Kim, Sungho Kang. 11-12 [doi]
• Security analysis of intelligent vehicles: Challenges and scopeMadhusudan Singh, Shiho Kim. 13-14 [doi]
• Introduce reward-based intelligent vehicles communication using blockchainMadhusudan Singh, Shiho Kim. 15-16 [doi]
• High resolution tactile sensing with silicon MEMS sensors for measurement of fingertip sensationHidekuni Takao. 17-18 [doi]
• A pipeline ROM-less DDFS using equal-division interpolationTsung-Yi Tsai, Hsiang-Yu Shih, Chua-Chin Wang. 19-20 [doi]
• Low-power null convention logic design based on modified gate diffusion input techniquePrashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi. 21-22 [doi]
• A low voltage capacitor based current controlled sense amplifier for input offset compensationY. Sudha Vani, N. Usha Rani, Ramesh Vaddi. 23-24 [doi]
• Unequal protection approach for RLL-constrained LDPC coded recording system using deliberate flippingHong-Fu Chou, Chiu-Wing Sham. 25-26 [doi]
• LARECD: Low area overhead and reliable error correction DMR architectureHyunyul Lim, Tae-Hyun Kim, DongSu Lee, Sungho Kang. 27-28 [doi]
• Low phase noise pulse rotary wave voltage controlled oscillatorMerritt Miller, Aditya Dalakoti, Prashansa Mukim, Forrest Brewer. 29-30 [doi]
• A multiband fully integrated high-linearity power amplifier using a 0.18-μm CMOS process for LTE applicationsTsung-Ying Wu, Jeng-Rern Yang. 31-32 [doi]
• Design of a 2.4-GHz 2.2-mW CMOS RF receiver front-end for BLE applicationsShinil Chang, Yongho Lee, Hyunchol Shin. 33-34 [doi]
• Design of power-efficient class-D CMOS power amplifier with resistor feedbackGyu-Sup Won, Dong Soo Lee, SungHun Cho, Kang-Yoon Lee. 35-36 [doi]
• A 10-Gb/s equalizer with digital adaptationJui-Cheng Hsiao, Dai-En Jhou, Tai-Cheng Lee. 38-39 [doi]
• Instruction set extension and hardware acceleration for SVM application toward a vector processorYalong Pang, Jun Han, Jianmin Zeng, Yujie Huang, Xiaoyang Zeng. 42-43 [doi]
• A dynamic fixed-point representation for neuromorphic computing systemsYongshin Kang, Jaeyong Chung. 44-45 [doi]
• A new stochastic mutiplier for deep neural networksSubin Huh, Joonsang Yu, Kiyoung Choi. 46-47 [doi]
• Hand gesture recognition using deep learningSoeb Hussain, Rupal Saxena, Xie Han, Jameel Ahmed Khan, Hyunchul Shin. 48-49 [doi]
• A battery-connected all-digital capacitive DC-DC converter with load tracking controllerMohamed Khairy Bahry, Mohamed El-Nozahi, Emad Hegazi. 51-52 [doi]
• High DC gain and wide output swing class-C inverterYaya Chen, Yan Han, Shifeng Zhang, Tianlin Cao, Xiaoxia Han, Ray C. C. Cheung. 53-54 [doi]
• Nano-second scale dynamic voltage scaler based on charge-pump and BW-DACA. N. Ragheb, Hyungwon Kim. 55-56 [doi]
• Analog front-end for EMG acquisition systemBum-Sik Chung, Hyeong-Kyu Kim, Kang-Il Cho, Ho-Jin Kim, Gil-Cho Ahn. 57-58 [doi]
• Wireless power transfer to stacked modules for IoT sensor nodesShusuke Yanagawa, Ryota Shimizu, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda. 59-60 [doi]
• A fully integrable RF energy harvester with dynamic efficiency tuningMenghan Sun, Derek Abbott, Said F. Al-Sarawi. 61-62 [doi]
• A smart low power R-R-I heartbeat monitor system with contactless UWB sensorKazutami Arimoto, Daichi Yamashita, Nao Igawa, Tomoyuki Yokogawa, Yoichiro Sato, Isao Kayano, Akio Shiratori. 63-64 [doi]
• Parallel in-order execution architecture for low-power processorKyungmin Lee, Ipoom Jeong, Won Woo Ro. 65-66 [doi]
• Convolutional neural network for industrial egg classificationRyota Shimizu, Shusuke Yanagawa, Toru Shimizu, Mototsugu Hamada, Tadahiro Kuroda. 67-68 [doi]
• High performance and low power timing controller design for LCoS microdisplay systemSung-Wook Eo, Joon Goo Lee, Min-Seok Kim, Young-Chai Ko. 71-72 [doi]
• Variable bit truncation technique for approximate stochastic computing (ASC)Ramu Seva, Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi. 73-74 [doi]
• Design of high efficiency of 98 percent active rectifier with automatic zero voltage and current switching circuit for wireless charging systemKi-Deok Kim, ByeongGi Jang, Sung Jin Oh, Kang-Yoon Lee. 75-76 [doi]
• Design method for inductorless low-noise amplifiers with active shunt-feedback in 65-nm CMOSToshiyuki Inoue, Akira Tsuchiya, Keiji Kishine, Makoto Nakamura. 77-78 [doi]
• -23.5dBm senstivity, 900MHz differential-drive rectifierAstrie Nurasyeila Fifie Asli, Yan Chiew Wong. 79-80 [doi]
• WLAN transceiver for 802.11 a/b/g/n/ac with integrated power amplifier and harmonic LO frequency VCOMinsu Jeong, Ockgoo Lee, Soo-Won Kim. 81-82 [doi]
• Characterizing convolutional neural network workloads on a detailed GPU simulatorKwanghee Chang, Minsik Kim, Kyungah Kim, Won Woo Ro. 84-85 [doi]
• Implementation of the XY2-100 protocol on low-cost microcontrollerDinh Van Luan, Nguyen Xuan Truong, Hyun Kim, Hyuk-Jae Lee. 86-87 [doi]
• A selector-based FFT processor and its FPGA implementationYuya Hirai, Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa. 88-89 [doi]
• Embedded system-on-chip design of atrial fibrillation classifierHuey Woan Lim, Yuan Wen Hau, Mohd Afzan Othman, Chiao Wen Lim. 90-91 [doi]
• Hardware/software model of DCO-OFDM based visible light communication SoC using DMATrio Adiono, Angga Pratama Putra. 92-93 [doi]
• Design of a high speed CMOS image sensor with a hybrid single-slope column ADC and a finite state machineKeunyeol Park, Minhyun Jin, Soo Youn Kim, Minkyu Song. 95-96 [doi]
• A 1.6mW 320×240 pixel vision sensor for event detectionYu Zou, Massimo Gottardi, Michela Lecca. 97-98 [doi]
• A high-sensitivity signal conditioning interface for capacitive touch key using ΔΣ modulationBing Li, Lin-Fa Ma, Wei Wang, Ji-Ping Na, Chuang Li. 99-100 [doi]
• Robust AES circuit design for delay variation using suspicious timing error predictionYuki Yahagi, Masao Yanagisawa, Nozomu Togawa. 101-102 [doi]
• An efficient convolutional neural networks design with heterogeneous SRAM cell sizingWonseok Choi, Jongsun Park. 103-104 [doi]
• An efficient built-in self-repair scheme for area reductionKeewon Cho, Young-Woo Lee, Sungyoul Seo, Sungho Kang. 105-106 [doi]
• Low power multi-context look-up table (LUT) using spin-torque transfer magnetic RAM for non-volatile FPGAKyungseon Cho, Seungjin Lee, Choong Keun Lee, Taegun Yim, Hongil Yoon. 107-108 [doi]
• High-performance RF-interconnect for 3D stacked memoryAhmed Alzahmi, Nahid Mirzaie, Chung-Ching Lin, Insoo Kim, Gyung-Su Byun. 109-110 [doi]
• A 1.2 V, 33 ppm/°C, 40 nW, regeneration based BGR circuit for nanowatt CMOS LSIsAbhishek Shrivastava, Amandeep Kaur, Mukul Sarkar. 111-112 [doi]
• Multiple output variable overdrive voltage CMOS current mirrorKoichi Saito, Akio Shimizu, Yohei Ishikawa, Takuro Noguchi, Sumio Fukai. 113-114 [doi]
• A low-power relaxation oscillator with improved thermal stabilityLiangduo Peng, Yuan Cao, Xiaofang Pan, Xiaojin Zhao. 115-116 [doi]
• A CMOS bandgap voltage reference with current-control circuits for the extended operating temperature rangeRuhaifi Abdullah Zawawi, Nuha A. Rhaffor, Shukri Korakkottil Kunhi Mohd, Sofiyah Sal Hamid, Asrulnizam Abd Manaf, Kazuaki Sawada. 117-118 [doi]
• A 1 MHz-10.2 MHz BW/0 dB-70 dB gain DPOTA-based baseband chain receiverMohamed B. Elamien, Soliman A. Mahmoud. 119-120 [doi]
• A selective error data capture method using on-chip DRAM for silicon debug of multi-core designHyunggoy Oh, Heetae Kim, Jaeil Lim, Sungho Kang. 121-122 [doi]
• Test data reduction method based on berlekamp-massey algorithmHyeonchan Lim, Junghwan Kim, Soyeon Kang, Sungho Kang. 123-124 [doi]
• Hybrid path-diversity-dominant output selection method for Network-on-Chip systemsJindun Dai, Wenda Ma, Xin Jiang, Takahiro Watanabe. 125-126 [doi]
• Development of a reduction algorithm for CAN frame bitsRonnie O. Serfa Juan, Byoung Hwan Ko, Chan Su Park, Hi-Seok Kim. 127-128 [doi]
• Optimization of clock mesh based on wire sizing variationMeng Liu, Zhiwei Zhang, Wenqin Sun, Donglin Wang. 129-130 [doi]
• Low-area implementations of concurrent error detection logarithmic processorsTso-Bing Juang, Ying-Ren Lee. 131-132 [doi]
• Cooperation of multi robots for disaster rescueQilei Ren, Ka Lok Man, Eng Gee Lim, Jinkyung Lee, Kyung Ki Kim. 133-134 [doi]
• Mobile phone antennaCheng Zhu, Zhao Wang, Mark Leach, Ka Lok Man, Eng Gee Lim. 135-136 [doi]
• Wireless low power toxic gas detector based on ADuCM360Minming Gu, ZhenPing Xia, Yan Lei, Lin Zhang, Jieming Ma. 137-138 [doi]
• Clothing-based wearable sensors for unobtrusive interactions with mobile devicesVijayakumar Nanjappan, Hai-Ning Liang, Kim Lau, Jaemin Choi, Kyung Ki Kim. 139-140 [doi]
• Chaotic circuits network with scale-free coupling distributionYoko Uwate, Yoshifumi Nishio. 142-143 [doi]
• On-chip epilepsy detection: Where machine learning meets patient-specific healthcareJerald Yoo. 146-147 [doi]
• Digital embedded memory scheme using voltage scaling and body bias separation for low-power systemYusuke Yoshida, Kimiyoshi Usami, Hideharu Amano. 148-149 [doi]
• An inductive-coupling link for 3-D Network-on-ChipsJunichiro Kadomoto, Hideharu Amano, Tadahiro Kuroda. 150-151 [doi]
• Building block multi-chip systems using inductive coupling through chip interfaceHideharu Amano, Tadahiro Kuroda, Hiroshi Nakamura, Kimiyoshi Usami, Masaaki Kondo, Hiroki Matsutani, Mitaro Namiki. 152-154 [doi]
• Scalable deep neural network accelerator cores with cubic integration using through chip interfaceRyuichi Sakamoto, Ryo Takata, Jun Ishii, Masaaki Kondo, Hiroshi Nakamura, Tetsui Ohkubo, Takuya Kojima, Hideharu Amano. 155-156 [doi]
• Building block operating system for 3D stacked computer systems with inductive coupling interconnectShinsuke Hamada, Atsushi Koshiba, Mitaro Namiki, Hideharu Amano. 157-158 [doi]
• A low-offset, low-noise, fully differential receiver with a differential signaling method for fingerprint mutual capacitive touch screenSanghyun Heo, Joohyeb Song, Kyoungmin Park, Eun-Ho Choi, Seong-Mun Kim, Franklin Bien. 166-167 [doi]
• Parallel architecture for concatenated polar-CRC codesSeunghun Oh, Hanho Lee. 173-174 [doi]
• Internal circuit offset auto compensation current sensor for wireless power systemsByeongGi Jang, SeongJin Oh, Young-Jun Park, Kang-Yoon Lee. 176-177 [doi]
• Low-noise high-speed CMOS CID readout ICDong-Kyu Kim, Hyun-Sik Kim. 178-179 [doi]
• A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variationsSangsu Lee, Jaehun Jun, Chulwoo Kim. 180-181 [doi]
• High linearity transimpedance amplifier in 0.18-μm CMOS technology for 20-Gb/s PAM-4 receiversChih-Chen Peng, Jau-Ji Jou, Tien-Tsorng Shih, Chien-Liang Chiu. 182-183 [doi]
• A study of low jitter phase locked loop for SPDIFJihoon Kim, Yong Moon. 184-185 [doi]
• Buck DC-DC converter with PFM/PWM dual mode self-tracking zero current detectorSang Hyuk Park, Kwan-Tae Kim, Kang-Yoon Lee. 186-187 [doi]
• A design of 10MHz/20MHz bandwidth baseband circuit with high performance of ACRRKwan-Tae Kim, Sung Jin Kim, Dong Soo Lee, Kang-Yoon Lee. 188-189 [doi]
• Design of highly stable bandgap reference circuit for RF power harvester module of a 13.56 MHz smart card tag ICTrio Adiono, Prasetiyo, Suksmandhira Harimurti, Khilda Afifah, Amy Hamidah Salman. 190-191 [doi]
• Design of filter tuning circuit to compensate band width change of band pass filter by process and temperatureDonggyu Kim, Chan Ho Kim, Dong Soo Lee, Kang-Yoon Lee. 192-193 [doi]
• Multiple-output LDO regulator applying with constant feedback factorHyunsun Mo, Daejeong Kim. 194-195 [doi]
• HV voltage sensor for 16 series li-ion battery cells using chopper stabilized amplifierTzung-Je Lee, Guan-Jhang Li. 196-197 [doi]
• A design of ultra-low noise LDO using noise reduction network techniquesHamed Abbasizadeh, Behnam Samadpoor Rikan, Thi Kim Nga Truong, Kwan-Tae Kim, Sung Jin Kim, Dong Soo Lee, Kang-Yoon Lee. 198-199 [doi]
• A low leakage retention LDO and leakage-based BGR with 120nA quiescent currentBehnam Samadpoor Rikan, Hamed Abbasizadeh, Thi Kim Nga Truong, Sung Jin Kim, Kang-Yoon Lee. 200-201 [doi]
• Design of a capacitor-less LDO with high PSRR for RF energy harvesting applicationsDanial Khan, Hamed Abbasizadeh, Zaffar Hayat Nawaz Khan, Young-Jun Park, Kang-Yoon Lee. 202-203 [doi]
• A high efficiency Digital PWMDC-DC converter using hybrid control technique for EH applicationsTruong Thi Kim Nga, Hamed Abbasizadeh, Truong Van Cong Thuong, Kang-Yoon Lee. 204-205 [doi]
• A high-efficiency active rectifier by using zero current sensing and deglitch circuit for inductive coupling receiverSyed Adil Ali Shah, Young-Jun Park, Hamed Abbasizadeh, Zaffar Hayat Nawaz Khan, Danial Khan, Kang-Yoon Lee. 206-207 [doi]
• 6-Parallel RF energy harvesting rectifier with high power conversion efficiency (PCE) for 5.8GHz 3W wireless power transferZaffar Hayat Nawaz Khan, Danial Khan, Nabeel Ahmad, Hamed Abbasizadeh, Syed Adil Ali Shah, Young-Jun Park, Kang-Yoon Lee. 208-209 [doi]
• Low-dropout regulator with low output peak voltage with soft-start added to bandgap reference outputJi Hyeon Cheon, Sung Jin Kim, Dong Soo Lee, Kang-Yoon Lee. 210-211 [doi]
• Distortion analysis for a DC-DC buck converterVijender Kumar Sharma, Hitesh Shrimali, Jai Narayan Tripathi, Rakesh Malik. 212-213 [doi]
• A sub-threshold ultra-low power low-dropout regulatorTruong Van Cong Thuong, Young-Jun Park, Truong Thi Kim Nga, Kang-Yoon Lee. 214-215 [doi]
• A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOSYung-Hui Chung, Wei-Shu Rih. 216-217 [doi]
• Modeling of second order continuous-time sigma delta modulator in LabVIEWMuhammad Riaz ur Rehman, Behnam Samadpoor Rikan, Deeksha Verma, Imran Ali, Kang-Yoon Lee. 218-219 [doi]
• A high-speed, low-offset and low-power differential comparator for analog to digital convertersMehdi Nasrollahpour, Chi-Hsien Yen, Sotoudeh Hamedi-Hagh. 220-221 [doi]
• Design of asynchronous SAR ADC for low power mixed signal applicationsDeeksha Verma, Hye-Yeong Kang, Khuram Shehzad, Muhammad Riaz ur Rehman, Kang-Yoon Lee. 222-223 [doi]
• Low-power 10-bit SAR ADC using class-AB type amplifier for IoT applicationsKhuram Shehzad, Hye-Young Kang, Deeksha Verma, Young-Jun Park, Kang-Yoon Lee. 224-225 [doi]
• A fully-digital phase modulator with phase calibration loop for high data-rate systemsYong-Chang Choi, Sang-Sun Yoo, Hyung-Joun Yoo. 226-227 [doi]
• Design of a 400-MHz 1-V 1.4-mW CMOS RF receiver for MICS applicationsMihye Moon, Shinil Chang, Yongho Lee, Hyunchol Shin. 228-229 [doi]
• Design of a 1-V 3-mW 2.4-GHz fractional-N PLL synthesizer in 65nm CMOSYongho Lee, Seungsoo Kim, Hyunchol Shin. 230-231 [doi]
• Implementation of RF narrow band frequency synthesizer for LoRaWAN systemDong-Shik Kim, Won Sang Yoon, Sang-Hoon Chai. 232-233 [doi]
• A linear InGaP/GaAs HBT power amplifier for LTE B7 applicationsHui Dong Lee, Cheol Ho Kim, Sunwoo Kong, Seunghyun Jang, Kwang-Seon Kim, Myung Don Kim, Bonghyuk Park. 234-235 [doi]
• Design of 36 dB IRR baseband analog for Bluetooth low energy 5.0 application in 55 nm CMOSChan Ho Kim, Dong-gyu Kim, Dong Soo Lee, Kang-Yoon Lee. 236-237 [doi]
• A 0.5-V 320 μW CMOS MedRadio receiver RF front-end with a current-reuse gw-boosting common gate low noise amplifierTaejong Kim, Sinyoung Kim, Kuduck Kwon. 238-239 [doi]
• An ultra-low-power 2.4 GHz receiver RF front-end employing a RF quadrature Gm-stage for Bluetooth low energy applicationsSinyoung Kim, Taejong Kim, Kuduck Kwon. 240-241 [doi]
• A low power 2.4 GHz quadrature local oscillator buffer for Bluetooth low energy applicationsSinyoung Kim, Taejong Kim, Kuduck Kwon. 242-243 [doi]
• st speculative tapGyunam Jeon, Yong-Bin Kim. 244-245 [doi]
• A clock recovery for 2.56 GSymbol/s MIPI C-PHY receiverJin-Wook Han, Pil-Ho Lee, Yeong-Woong Kim, Sang Dong Kim, Jin-Woo Park, Young-Chan Jang. 246-247 [doi]
• A 1.5-Gb/s adaptive equalizer with periodically embedded clock encoding for intra-panel interfacesChia-Chi Liu, Ching-Yuan Yang. 248-249 [doi]
• A 1.5-Gb/s equalizer with adaptive swing controller for TFT-LCD driverYen-Chen Lin, Ching-Yuan Yang, James Chang. 250-251 [doi]
• A low-power SerDes for high-speed on-chip networksDongjun Park, Junsub Yoon, Jongsun Kim. 252-253 [doi]
• Hardware feasible offset and gain error correction for time-interleaved ADCSadeque Reza Khan, Arifa Ferdousi, GoangSeog Choi. 254-255 [doi]
• A novel scheme for information hiding at physical layer of wireless communicationsSumedh Dhabu, Chip-Hong Chang. 256-257 [doi]
• Compact implementation IIR filter in FPGA for noise reduction of sensor signalKoki Arauchi, Shohei Maki, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine. 258-259 [doi]
• Low power BCH decoder using early termination scheme for WBAN standardSeo Lin Jeong, Myung Hoon Sunwoo. 260-261 [doi]
• A design of ultra low power I2C synchronous slave controller with interface voltage level independency in 180 nm CMOS technologyImran Ali, SungHun Cho, Dong-gyu Kim, Muhammad Riaz ur Rehman, Kang-Yoon Lee. 262-263 [doi]
• Improved CAN compression algorithm by data reorderingYeon-Jin Kim, Yang Zou, Jin-Gyun Chung. 264-265 [doi]
• Facial expression recognition system using machine learningSanghyuk Kim, Gwon Hwan An, Suk-Ju Kang. 266-267 [doi]
• High-performance two-step lagrange interpolation technique for 4K UHD applicationsYunho Park, Youngmin Kim, Youngjoo Lee. 268-269 [doi]
• HMD-based virtual multi-screen control system and its gesture interfaceSangho Yoon, Hanjoo Cho, Sang Won Cho, Young-Hwan Kim. 270-271 [doi]
• Motion vector-based film mode detection for frame rate up-conversionSang Won Cho, Sangho Yoon, Young-Hwan Kim. 272-273 [doi]
• An acquisition method of distance information in direction signsTae-Hun Nam, Erdenetuya, T. S. Kavya, Young Min Jang, Sang-Bock Cho. 274-275 [doi]
• Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technologyChi-Hsien Wu, Jau-Ji Jou, Hsin-Wen Ting, Shao-I Chu, Bing-Hong Liu. 276-277 [doi]
• High-performance and energy-efficient approximate multiplier for error-tolerant applicationsSunghyun Kim, Youngmin Kim. 278-279 [doi]
• Dynamic power estimation for ROM-less DDFS designs using switching activity analysisWei Wang, Yuan-Yuan Xu, Chua-Chin Wangt. 280-281 [doi]
• Time-domain temperature sensor based on interlaced hysteresis delay cellsYun Seok Hong, Yong-Bin Kim, Kyung Ki Kim. 282-283 [doi]
• Unpredictable 16 bits LFSR-based true random number generatorMangi Han, Youngmin Kim. 284-285 [doi]
• An 8Gb/s adaptive DFE with level calibration using training data pattern for mobile DRAM interfaceMinchang Kim, Jihwan Park, Joo-Hyung Chae, Hyeongjun Ko, Mino Kim, Suhwan Kim. 286-287 [doi]
• Energy-efficient write circuit in STT-MRAM based look-up table (LUT) using comparison write schemeSeungjin Lee, Taegun Yim, Choong Keun Lee, Kyungseon Cho, Hongil Yoon. 288-289 [doi]
• Energy efficient and high throughput transceiver design in the capacitive coupling mode exploring tunnel transistors for 3D ICsT. Nagateja, Ramesh Vaddi. 290-291 [doi]
• Image compression based on MR-CNN (Modified Region Convolutional Neural Network)SeongMo Park, Byoung-Gun Choi, Kwang-Il Oh, S. E. Kim, J. H. Lee, J.-J. Lee, Sung Weon Kang. 292-293 [doi]
• A FPGA-based neural accelerator for small IoT devicesSeongmin Hong, Yongjun Park. 294-295 [doi]
• Implemetation of image classification CNN using multi thread GPUSeong-Hyeon Han, Kwang-Yeob Lee. 296-297 [doi]
• Implementation of deep learning neural network for real-time object recognition in OpenCL frameworkYukui Luo, Shuai Li, Kuangyuan Sun, Raul Renteria, Ken Choi. 298-299 [doi]
• Highly-efficient parallel convolution acceleration by using multiple GPUsKuangyuan Sun, Shuai Li, Yukui Luo, Raul Renteria, Ken Choi. 300-301 [doi]
• Effective sampling method for statistical leakage analysis: Hybrid sampling methodByeong-jun Bang, Hyun-jeong Kwon, Young-Hwan Kim. 302-303 [doi]
• Impact of processor cache memory on storage performanceYoung-kuen Kim, Yong Ho Song. 304-305 [doi]
• A SoC platform for emerging technologiesYonatan Shoshan, Slava Yuzhaninov, Noa Edri, Shay Harari, Yehuda Rudin, Yoav Weizman, Itai Nadler, Nir Rosenberg, Benjamin Flom, Dotan Bechor, Gilad Morag, Evgeny Grigoriants, Naftaly Blum, Ronen Daly, Maya Reuveni, Alexander Fish. 306-307 [doi]
• Memory efficient self guided image filteringPervaiz Kareem, Asim Khan, Chong-Min Kyung. 308-309 [doi]
• FPGA-based transceiver circuit for labeling signal transmission systemKohei Nomura, Natsuyuki Koda, Toshiyuki Inoue, Akira Tsuchiya, Keiji Kishine. 310-311 [doi]
• Design of CAN - CAN FD bridge for in-vehicle networkJung-Hwan Oh, Jong Uk Wi, Seung Eun Lee. 312-313 [doi]
• A highly linear DPOTA-based configurable analog front-end for EXG (EEG, ECG, and EMG)Mohamed B. Elamien, Soliman A. Mahmoud. 314-315 [doi]
• A standard CMOS neural stimulator IC with high voltage compliant output current driverVo Nhut Tuan, Hyouk-Kyu Cha. 316-317 [doi]
• A low-power low-noise ultrasonic receiver front-end IC for medical imaging systemsFatia Uftiani Putri, Hyouk-Kyu Cha. 318-319 [doi]
• Development of SoC virtual platform for IoT terminals based on OneM2MHyoung-Ro Lee, Chi-Ho Lin, Ki Hyuk Park, Won-jong Kim, Han-Jin Cho. 320-321 [doi]
• High performance pulse ring voltage controlled oscillator for Internet of ThingsAditya Dalakoti, Merritt Miller, Forrest Brewer. 322-323 [doi]