Functional Built-In Delay Binning and Calibration Mechanism for On-Chip at-Speed Self Test

Chen-I Chung, Jyun-Sian Jhou, Ching-Hwa Cheng, Sih-Yan Li. Functional Built-In Delay Binning and Calibration Mechanism for On-Chip at-Speed Self Test. In Proceedings of the Eighteentgh Asian Test Symposium, ATS 2009, 23-26 November 2009, Taichung, Taiwan. pages 163-168, IEEE Computer Society, 2009. [doi]

Authors

Chen-I Chung

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Jyun-Sian Jhou

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Ching-Hwa Cheng

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Sih-Yan Li

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