A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOS

Yung-Hui Chung, Wei-Shu Rih. A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOS. In International SoC Design Conference, ISOCC 2017, Seoul, Korea (South), November 5-8, 2017. pages 216-217, IEEE, 2017. [doi]

Authors

Yung-Hui Chung

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Wei-Shu Rih

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