Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model

Maciej J. Ciesielski, Tiankai Su, Atif Yasin, Cunxi Yu. Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model. IEEE Trans. on CAD of Integrated Circuits and Systems, 39(6):1346-1357, 2020. [doi]

@article{CiesielskiSYY20,
  title = {Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model},
  author = {Maciej J. Ciesielski and Tiankai Su and Atif Yasin and Cunxi Yu},
  year = {2020},
  doi = {10.1109/TCAD.2019.2912944},
  url = {https://doi.org/10.1109/TCAD.2019.2912944},
  researchr = {https://researchr.org/publication/CiesielskiSYY20},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {39},
  number = {6},
  pages = {1346-1357},
}