A multiple valued logic approach for the synthesis of garbled circuits

Stelvio Cimato, Valentina Ciriani, Ernesto Damiani, Maryam Ehsanpour. A multiple valued logic approach for the synthesis of garbled circuits. In 2017 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017. pages 1-5, IEEE, 2017. [doi]

Abstract

Abstract is missing.