Luca Colagrande, Jayanth Jonnalagadda, Luca Benini. Late Breaking Results: A RISC-V ISA Extension for Chaining in Scalar Processors. In Design, Automation & Test in Europe Conference, DATE 2025, Lyon, France, March 31 - April 2, 2025. pages 1-2, IEEE, 2025. [doi]
Abstract is missing.