A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories

Enrico Costenaro, Massimo Violante, Dan Alexandrescu. A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. In 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 13-15 July, 2011, Athens, Greece. pages 49-54, IEEE, 2011. [doi]

Authors

Enrico Costenaro

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Massimo Violante

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Dan Alexandrescu

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