Michel Côté, Philippe Hurat. Layout Printability Optimization Using a Silicon Simulation Methodology. In 5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA. pages 159-164, IEEE Computer Society, 2004. [doi]
@inproceedings{CoteH04,
title = {Layout Printability Optimization Using a Silicon Simulation Methodology},
author = {Michel Côté and Philippe Hurat},
year = {2004},
url = {http://csdl.computer.org/comp/proceedings/isqed/2004/2093/00/20930159abs.htm},
tags = {optimization, layout},
researchr = {https://researchr.org/publication/CoteH04},
cites = {0},
citedby = {0},
pages = {159-164},
booktitle = {5th International Symposium on Quality of Electronic Design (ISQED 2004), 22-24 March 2004, San Jose, CA, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-2093-6},
}