A single bit 6.8mW 10MHz power-optimized continuous-time ΔΣ with 67dB DR in 90nm CMOS - researchr publication authors

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Pieter Crombez, Geert Van der Plas, Michiel Steyaert, Jan Craninckx. A single bit 6.8mW 10MHz power-optimized continuous-time ΔΣ with 67dB DR in 90nm CMOS. In 35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14-18 September 2009. pages 336-339, IEEE, 2009. [doi]

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