Sequential equivalence checking of clock-gated circuits

Yu-Yun Dai, Kei-Yong Khoo, Robert K. Brayton. Sequential equivalence checking of clock-gated circuits. In Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015. pages 51, ACM, 2015. [doi]

Abstract

Abstract is missing.