Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs

Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini. Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs. In 30th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012. pages 45-48, IEEE Computer Society, 2012. [doi]

@inproceedings{DallOssoBGBB12,
  title = {Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs},
  author = {Matteo Dall'Osso and Gianluca Biccari and Luca Giovannini and Davide Bertozzi and Luca Benini},
  year = {2012},
  doi = {10.1109/ICCD.2012.6378615},
  url = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2012.6378615},
  researchr = {https://researchr.org/publication/DallOssoBGBB12},
  cites = {0},
  citedby = {0},
  pages = {45-48},
  booktitle = {30th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-3051-0},
}