Nam-Khanh Dang, Xuan-Tu Tran, Alain Merirot. An efficient hardware architecture for inter-prediction in H.264/AVC encoders. In 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014. pages 294-297, IEEE, 2014. [doi]
@inproceedings{DangTM14,
title = {An efficient hardware architecture for inter-prediction in H.264/AVC encoders},
author = {Nam-Khanh Dang and Xuan-Tu Tran and Alain Merirot},
year = {2014},
doi = {10.1109/DDECS.2014.6868813},
url = {http://dx.doi.org/10.1109/DDECS.2014.6868813},
researchr = {https://researchr.org/publication/DangTM14},
cites = {0},
citedby = {0},
pages = {294-297},
booktitle = {17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2014, Warsaw, Poland, 23-25 April, 2014},
publisher = {IEEE},
isbn = {978-1-4799-4560-3},
}