A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping

Simone Mattia Dartizio, Francesco Tesolin, Mario Mercandelli, Alessio Santiccioli, Abanob Shehata, Saleh Karman, Luca Bertulessi, Francesco Buccoleri, Luca Avallone, Angelo Parisi, Andrea L. Lacaita, Michael Peter Kennedy, Carlo Samori, Salvatore Levantino. A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping. J. Solid-State Circuits, 57(6):1723-1735, 2022. [doi]

@article{DartizioTMSSKBB22,
  title = {A 12.9-to-15.1-GHz Digital PLL Based on a Bang-Bang Phase Detector With Adaptively Optimized Noise Shaping},
  author = {Simone Mattia Dartizio and Francesco Tesolin and Mario Mercandelli and Alessio Santiccioli and Abanob Shehata and Saleh Karman and Luca Bertulessi and Francesco Buccoleri and Luca Avallone and Angelo Parisi and Andrea L. Lacaita and Michael Peter Kennedy and Carlo Samori and Salvatore Levantino},
  year = {2022},
  doi = {10.1109/JSSC.2021.3116860},
  url = {https://doi.org/10.1109/JSSC.2021.3116860},
  researchr = {https://researchr.org/publication/DartizioTMSSKBB22},
  cites = {0},
  citedby = {0},
  journal = {J. Solid-State Circuits},
  volume = {57},
  number = {6},
  pages = {1723-1735},
}