Noise-power-area optimised design procedure for OTAs with complementary input transistors for neural amplifiers

Devarshi Mrinal Das, Kashyap Barot, Abhishek Srivastava, Maryam Shojaei Baghini. Noise-power-area optimised design procedure for OTAs with complementary input transistors for neural amplifiers. IET Circuits, Devices & Systems, 14(5):702-706, 2020. [doi]

@article{DasBSB20-0,
  title = {Noise-power-area optimised design procedure for OTAs with complementary input transistors for neural amplifiers},
  author = {Devarshi Mrinal Das and Kashyap Barot and Abhishek Srivastava and Maryam Shojaei Baghini},
  year = {2020},
  doi = {10.1049/iet-cds.2019.0259},
  url = {https://doi.org/10.1049/iet-cds.2019.0259},
  researchr = {https://researchr.org/publication/DasBSB20-0},
  cites = {0},
  citedby = {0},
  journal = {IET Circuits, Devices & Systems},
  volume = {14},
  number = {5},
  pages = {702-706},
}