Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs

Reetuparna Das, Soumya Eachempati, Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das. Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs. In 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA. pages 175-186, IEEE Computer Society, 2009. [doi]

Authors

Reetuparna Das

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Soumya Eachempati

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Asit K. Mishra

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Narayanan Vijaykrishnan

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Chita R. Das

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