Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs

Reetuparna Das, Soumya Eachempati, Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das. Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs. In 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA. pages 175-186, IEEE Computer Society, 2009. [doi]

@inproceedings{DasEMVD09,
  title = {Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs},
  author = {Reetuparna Das and Soumya Eachempati and Asit K. Mishra and Narayanan Vijaykrishnan and Chita R. Das},
  year = {2009},
  doi = {10.1109/HPCA.2009.4798252},
  url = {http://dx.doi.org/10.1109/HPCA.2009.4798252},
  tags = {design},
  researchr = {https://researchr.org/publication/DasEMVD09},
  cites = {0},
  citedby = {0},
  pages = {175-186},
  booktitle = {15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 14-18 February 2009, Raleigh, North Carolina, USA},
  publisher = {IEEE Computer Society},
}