Pallavi Das, Jitendra Yadav, Sujay Deb. Mixed Mode Simulation and Verification of SSCG PLL through Real Value Modeling. In 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016. pages 591-592, IEEE Computer Society, 2016. [doi]
Abstract is missing.