Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©

Satyendra R. Datla, Mitchell A. Thornton, Luther Hendrix, Dave Henderson. Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©. In ISMVL 2009, 39th International Symposium on Multiple-Valued Logic, 21-23 May 2009, Naha, Okinawaw, Japan. pages 256-261, IEEE Computer Society, 2009. [doi]

Authors

Satyendra R. Datla

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Mitchell A. Thornton

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Luther Hendrix

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Dave Henderson

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