Abstract is missing.
- Counting Problems and Clones of FunctionsAndrei A. Bulatov. 1-6 [doi]
- Web-Based Nursing Care Quality Improvement System with Fuzzy Recommendation SystemReiko Sakashita, Atsuko Uchinuno, Kazuko Kamiizumi, Keiko Tei, Noriko Awaya. 7-11 [doi]
- A Study of Practical Causality Acquisition among Vital SignalsNaoki Tsuchiya, Hiroshi Nakajima. 12-17 [doi]
- Biometric System by Foot Pressure Change Based on Neural NetworkHong Ye, Syoji Kobashi, Yutaka Hata, Kazuhiko Taniguchi, Kazunari Asari. 18-23 [doi]
- Fuzzy Logic Assisted Quantification of Gyral Deformation Index Using Magnetic Resonance Images for the Infantile BrainSyoji Kobashi, Yuko Fujimoto, Masayo Ogawa, Kumiko Ando, Reiichi Ishikura, Seturo Imawaki, Shozo Hirota, Yutaka Hata. 24-29 [doi]
- Fuzzy Rule Extraction from Nursing-Care TextsManabu Nii, Takafumi Yamaguchi, Yutaka Takahashi, Atsuko Uchinuno, Reiko Sakashita. 30-35 [doi]
- Robust Multiple-Valued Current-Mode Circuit Components Based on Adaptive Reference-Voltage ControlNaoya Onizawa, Takahiro Hanyu. 36-41 [doi]
- Optimization of Current-Mode MVD-ORNS Arithmetic CircuitsMotoi Inaba, Koichi Tanno, Ryota Sawada, Hisashi Tanaka, Hiroki Tamura. 42-47 [doi]
- 16-level Current-Mode Multiple-Valued Dynamic Memory with Increased Noise MarginGolnar Khodabndehloo, Mitra Mirhassani, Majid Ahmadi. 48-53 [doi]
- Multiple-Valued Reconfigurable VLSI Processor Based on Superposition of Data and Control SignalsNobuaki Okada, Michitaka Kameyama. 54-59 [doi]
- Timing-Variation-Aware Multiple-Valued Current-Mode Circuit for a Low-Power Pipelined SystemTakashi Matsuura, Hirokatsu Shirahama, Masanori Natsui, Takahiro Hanyu. 60-65 [doi]
- Mining Approximative Descriptions of Sets Using Rough SetsDan A. Simovici, Selim Mimaroglu. 66-71 [doi]
- Positive Primitive StructuresBoris A. Romov. 72-76 [doi]
- Paradigms for Non-classical SubstitutionsPatrik Eklund, Maria A. Galán, Jari Kortelainen, Lawrence Neff Stout. 77-79 [doi]
- Bounding the Phase Transition on Edge Matching PuzzlesRamón Béjar, Cèsar Fernández, Carles Mateu, Nuria Pascual. 80-85 [doi]
- Efficient Implementation of Controlled Operations for Multivalued Quantum LogicDavid J. Rosenbaum, Marek A. Perkowski. 86-91 [doi]
- Quantum Finite State Machines as Sequential Quantum CircuitsMartin Lukac, Marek A. Perkowski. 92-97 [doi]
- Synthesis of GF(3) Based Reversible/Quantum Logic Circuits without Garbage OutputMd. Mahmud Muntakim Khan, Ayan Kumar Biswas, Shuvro Chowdhury, Masud Hasan, Asif Islam Khan. 98-102 [doi]
- Quantum Realization of Multiple-Valued Feynman and Toffoli Gates without Ancilla InputMozammel H. A. Khan. 103-108 [doi]
- Multi-valued Modal Fixed Point Logics for Model CheckingKoki Nishizawa. 109-113 [doi]
- Minimal Coverings of Maximal Partial ClonesKarsten Schölzel. 114-119 [doi]
- Frozen Boolean Partial Co-clonesGustav Nordh, Bruno Zanuttini. 120-125 [doi]
- The Minimal Covering of Maximal Partial Clones in 4-valued LogicKarsten Schölzel. 126-131 [doi]
- On the Guidance of Reversible Logic Synthesis by Dynamic Variable ReorderingDavid Y. Feinstein, Mitchell A. Thornton. 132-138 [doi]
- Design of a High-Speed Fuzzy Logic Controller Based on Log-Domain ArithmeticAli Razib, Scott Dick, Vincent C. Gaudet. 139-144 [doi]
- The Use of Multiple Connected Pseudo Minterms in the Synthesis of MVL FunctionsBambang A. B. Sarif, Mostafa Abd-El-Barr. 145-150 [doi]
- A Two-Pronged Approach of Power-Aware Voltage Scheduling for Real-Time Task Graphs in Multi-processor SystemsNaotake Kamiura, Ayumu Saitoh, Teijiro Isokawa, Nobuyuki Matsui. 151-156 [doi]
- Computational Neuroscience and Multiple-Valued LogicMitsuo Kawato. 157-160 [doi]
- Hyperclones Determined by Total-Parts of Hyper-relationsHajime Machida, Jovanka Pantovic. 161-166 [doi]
- On Endoprimal Monoids in Clone TheoryHajime Machida, Ivo G. Rosenberg. 167-172 [doi]
- Partial Clones Containing All Selfdual Monotonic Boolean Partial FunctionsLucien Haddad. 173-178 [doi]
- On Periodic Patterns and their SpectraClaudio Moraga, Radomir S. Stankovic, Jaakko Astola. 179-184 [doi]
- Generalized Discrete Hartley TransformsClaudio Moraga. 185-190 [doi]
- Generating Hard Instances for MaxSATRamón Béjar, Alba Cabiscol, Felip Manyà , Jordi Planes. 191-195 [doi]
- Regular Encodings from Max-CSP into Partial Max-SATJosep Argelich, Alba Cabiscol, Inês Lynce, Felip Manyà . 196-202 [doi]
- Multi-level Signaling for Chip-to-Chip and Backplane Communication (A Tutorial)Ali Sheikholeslami. 203-207 [doi]
- An Overview of a Software Tool in Rough Non-deterministic Information AnalysisHiroshi Sakai, Hiroshi Kimura, Michinori Nakata. 208-213 [doi]
- On Decision Making under Interval Uncertainty: A New Justification of Hurwicz Optimism-Pessimism Approach and its Use in Group Decision MakingVan-Nam Huynh, Yoshiteru Nakamori, Chenyi Hu, Vladik Kreinovich. 214-220 [doi]
- Optimization of Fuzzy If-Then Rule Bases by Evolutionary Tuning of the OperationsClaudio Moraga, Michio Sugeno, Enric Trillas. 221-226 [doi]
- Non-convex Fuzzy Truth Values and De Morgan BisemilatticesNoboru Takagi. 227-232 [doi]
- Evaluation of the Hierarchical Temporal Memory as Soft Computing Platform and its VLSI ArchitectureWim J. C. Melis, Shuhei Chizuwa, Michitaka Kameyama. 233-238 [doi]
- Multiple-Valued Constant-Power Adder for Cryptographic ProcessorsYuichi Baba, Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki. 239-244 [doi]
- Time-Interleaved Polyphase Decimation Filter Using Signed-Digit AddersMasaki Murozuka, Kazumasa Ikeura, Fumiyuki Adachi, Kazuya Machida, Takao Waho. 245-249 [doi]
- Multiple-Valued Data Transmission Based on Time-Domain Pre-emphasis Techniques in Consideration of Higher-Order Channel EffectsYasushi Yuminaka, Yasunori Takahashi, Kenichi Henmi. 250-255 [doi]
- Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©Satyendra R. Datla, Mitchell A. Thornton, Luther Hendrix, Dave Henderson. 256-261 [doi]
- Multiple Valued Logic Algebra for the Synthesis of Digital CircuitsMilton E. R. Romero, Evandro M. Martins, Ricardo R. Dos Santos. 262-267 [doi]
- Designing and Using FPGAs beyond Classical Binary Logic: Opportunities in Nano-Scale Integration AgeZeljko Zilic. 268-273 [doi]
- Attribute Reduction as Calculation of Focus in Granular ReasoningYasuo Kudo, Tetsuya Murai. 274-279 [doi]
- Clarifying the Systems of Axioms Based on the Method of Indeterminate CoefficientsTomoko Ninomiya, Masao Mukaidono. 280-285 [doi]
- Applying Rough Sets to Information Tables Containing Missing ValuesMichinori Nakata, Hiroshi Sakai. 286-291 [doi]
- Generalized Extended t-Norms as t-Norms of Type 2Mayuka F. Kawaguchi, Masaaki Miyakoshi. 292-297 [doi]
- Evaluation of Cardinality Constraints on SMT-Based DebuggingAndré Sülflow, Robert Wille, Görschwin Fey, Rolf Drechsler. 298-303 [doi]
- Application of Covering Codes for Reduced Representations of Logic FunctionsJaakko Astola, Radomir S. Stankovic. 304-311 [doi]
- Ternary Logic by 3rd Subharmonics and its Application to Multiway SwitchesTakako Soma, Takashi Soma. 312-317 [doi]
- Fixed Polarity Quaternary Transforms Derived from Linearly Independent Transform over GF(2) StructureCicilia C. Lozano, Bogdan J. Falkowski, Tadeusz Luba. 318-323 [doi]
- Equivalence Checking of Reversible CircuitsRobert Wille, Daniel Große, D. Michael Miller, Rolf Drechsler. 324-330 [doi]
- Multi-path Switching Device Utilizing a Multi-terminal Nanowire Junction for MDD-Based Logic CircuitSeiya Kasai, Yuta Shiratori, Kensuke Miura, Nan-Jian Wu. 331-336 [doi]
- Multiple-Valued Logic Gates Using Asymmetric Single-Electron TransistorsWancheng Zhang, Nan-Jian Wu, Tamotsu Hashizume, Seiya Kasai. 337-342 [doi]
- Scalable Architectures for Design of Reversible Quaternary Multiplexer and Demultiplexer CircuitsMozammel H. A. Khan. 343-348 [doi]
- Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary FunctionsShinobu Nagayama, Tsutomu Sasao, Jon T. Butler. 349-355 [doi]
- Representing the Genetic Code as a Function on a Galois Field Using the Reed-Muller ExpansionHosam A. Aleem, David H. Green, Ferda Mavituna. 356-361 [doi]
- A Quaternary Decision Diagram Machine and the Optimization of its CodeTsutomu Sasao, Hiroki Nakahara, Munehiro Matsuura, Yoshifumi Kawamura, Jon T. Butler. 362-369 [doi]
- Quaternary Reed-Muller Expansions of Mixed Radix Arguments in Cryptographic CircuitsAshur Rafiev, Julian P. Murphy, Alexandre Yakovlev. 370-376 [doi]