Satyendra R. Datla, Mitchell A. Thornton, Luther Hendrix, Dave Henderson. Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©. In ISMVL 2009, 39th International Symposium on Multiple-Valued Logic, 21-23 May 2009, Naha, Okinawaw, Japan. pages 256-261, IEEE Computer Society, 2009. [doi]
Abstract is missing.