Low voltage tunnel transistor architecture and its viability for energy efficient logic applications

Suman Datta. Low voltage tunnel transistor architecture and its viability for energy efficient logic applications. In Jörg Henkel, Ali Keshavarzi, Naehyuck Chang, Tahir Ghani, editors, Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009. pages 277-278, ACM, 2009. [doi]

@inproceedings{Datta09-0,
  title = {Low voltage tunnel transistor architecture and its viability for energy efficient logic applications},
  author = {Suman Datta},
  year = {2009},
  doi = {10.1145/1594233.1594300},
  url = {http://doi.acm.org/10.1145/1594233.1594300},
  tags = {architecture, logic},
  researchr = {https://researchr.org/publication/Datta09-0},
  cites = {0},
  citedby = {0},
  pages = {277-278},
  booktitle = {Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009, San Fancisco, CA, USA, August 19-21, 2009},
  editor = {Jörg Henkel and Ali Keshavarzi and Naehyuck Chang and Tahir Ghani},
  publisher = {ACM},
  isbn = {978-1-60558-684-7},
}