A global optimization tool for CMOS logic circuits

Marco Delaurenti, M. Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni. A global optimization tool for CMOS logic circuits. In 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999, Pafos, Cyprus, September 5-8, 1999. pages 1671-1674, IEEE, 1999. [doi]

Abstract

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