Stanislaw Deniziak, Mariusz Wisniewski. A symbolic RTL synthesis for LUT-based FPGAs. In Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, April 15-17, 2009, Liberec, Czech Republic. pages 102-107, IEEE Computer Society, 2009. [doi]
@inproceedings{DeniziakW09,
title = {A symbolic RTL synthesis for LUT-based FPGAs},
author = {Stanislaw Deniziak and Mariusz Wisniewski},
year = {2009},
doi = {10.1109/DDECS.2009.5012107},
url = {http://dx.doi.org/10.1109/DDECS.2009.5012107},
tags = {rule-based},
researchr = {https://researchr.org/publication/DeniziakW09},
cites = {0},
citedby = {0},
pages = {102-107},
booktitle = {Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, April 15-17, 2009, Liberec, Czech Republic},
publisher = {IEEE Computer Society},
}