Features of a Scan and Clock Resource chip for providing access to board-level test functions

Bulent I. Dervisoglu. Features of a Scan and Clock Resource chip for providing access to board-level test functions. J. Electronic Testing, 2(1):107-115, 1991. [doi]

@article{Dervisoglu91,
  title = {Features of a Scan and Clock Resource chip for providing access to board-level test functions},
  author = {Bulent I. Dervisoglu},
  year = {1991},
  doi = {10.1007/BF00134947},
  url = {http://dx.doi.org/10.1007/BF00134947},
  tags = {testing},
  researchr = {https://researchr.org/publication/Dervisoglu91},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Testing},
  volume = {2},
  number = {1},
  pages = {107-115},
}