Bulent I. Dervisoglu - researchr alias

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Viewing Publication 1 - 19 from 19

2002

Reducing Time to Volume and Time to Market: Is Silicon Debug and Diagnosis the Answer?Fidel Muradali, Mike Ricchetti, Bart Vermeulen, Bulent I. Dervisoglu, Bob Gottlieb, Bernd Koenemann, C. J. Clark. vts 2002: 445-446 [doi]

2001

A Unified DFT Architecture for Use with IEEE 1149.1 and VSIA/IEEE P1500 Compliant Test Access ControllersBulent I. Dervisoglu. dac 2001: 53-58 [doi]

1998

Shared I/O-cell structures: a framework for extending the IEEE 1149.1 boundary-scan standardBulent I. Dervisoglu, Mike Ricchetti, William Eklow. itc 1998: 980 [doi]

1995

Special Report: Shared-I/O Scan TestBulent I. Dervisoglu. dt, 12(4):81-83, 1995. [doi]

1994

Microprocessor Testing: Which Technique is Best? (Panel)Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther. dac 1994: 294 [doi]

1992

Boundary-Scan Update: IEEE P1149.2 Description and Status ReportBulent I. Dervisoglu. dt, 9(3):79-81, 1992. [doi]

1991

Features of a Scan and Clock Resource chip for providing access to board-level test functionsBulent I. Dervisoglu. et, 2(1):107-115, 1991. [doi]

Application of Scan-Based DFT Methodology for Detecting Static and Timing Failures in VLSI ComponentsBulent I. Dervisoglu, Gayvin E. Stong. vlsi 1992: 429-438

Design for Testability: Using Scanpath Techniques for Path-Delay Test and MeasurementBulent I. Dervisoglu, Gayvin E. Stong. itc 1991: 365-374

1990

Application of scan hardware and software for debug and diagnostics in a workstation environmentBulent I. Dervisoglu. tcad, 9(6):612-620, 1990. [doi]

Towards a standard approach for controlling board-level test functionsBulent I. Dervisoglu. itc 1990: 582-590 [doi]

1989

ATLAS/ELA: Scan-based Software Tools for Reducing System Debug Time in a State-of-the-art WorkstationBulent I. Dervisoglu, M. A. Keil. dac 1989: 718-721 [doi]

Scan-path architecture for pseudorandom testingBulent I. Dervisoglu. dt, 6(4):32-48, 1989. [doi]

1988

Using Scan Technology for Debug and Diagnostics in a Workstation EnvironmentBulent I. Dervisoglu. itc 1988: 976-986

1984

On Coosing a Hardware Descriptive Language for Digital Systems Testing/VerificationBulent I. Dervisoglu. itc 1984: 184-187

1981

A Hard Progammable Control Unit Design Using VLSI TechnologyBulent I. Dervisoglu, Donald J. Criscione. TC, 30(10):800-810, 1981.

1980

Theory and Design of Mixed-Mode Sequential MachinesBulent I. Dervisoglu, Howard A. Sholl. TC, 29(7):639-648, 1980.

1974

Hardware description languages in Great BritainBulent I. Dervisoglu. Computer, 7(12):64-66, 1974. [doi]

1973

Computer aided design techniques applied to logic designBulent I. Dervisoglu. PhD thesis, University of Edinburgh, UK, 1973. [doi]

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