The iFlow design factory infrastructure for a 17M-gate, 0.13μm, 333MHz design [SoC design]

Gilles-Eric Descamps, Satish Bagalkotkar. The iFlow design factory infrastructure for a 17M-gate, 0.13μm, 333MHz design [SoC design]. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 27-34, IEEE, 2003. [doi]

Abstract

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