Partitioning Sequential Circuits for Logic Optimization

Sujit Dey, Franc Brglez, Gershon Kedem. Partitioning Sequential Circuits for Logic Optimization. In Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD 91, Cambridge, MA, USA, October 14-16, 1991. pages 70-76, IEEE Computer Society, 1991.

Abstract

Abstract is missing.